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A Spartan-3E FPGA implementation of the ZX-Badaloc Spectrum clone
This project is aimed at synthesizing the ZX-Badaloc, a ZX-Spectrum Clone developed in Italy, into a Xilinx SPARTAN-3E Fpga.
Loading Pssst and running Simon Owen's PAC-MAN emulator on the Digilent Nexys2 3E board
The original project's main CPLD, I/O and Keyboard cplds, Z80
Processor, IDT dualport video ram can be squeezed into a single chip.
Top and bottom views of the original clone, made in 2006
This FPGA implementation has been developed by the same author and runs on the Digilent Nexys2 Spartan 3E evaluation board, featuring an XC3S1200E fpga. The XCS500E board version is probably capable of running the project as well.
from the original, CPLD-bases version
was first started on a Xilinx Spartan 3E "HW-SPAR3E-SK-UNI-G" board
and a Avnet 3A board, then merged togheter. Due to some user's
requests, references and documentation about the project on those
boards can be found here.
A few devices that were available on the Xilinx board are not present on the Nexys2: a SPI flash, an LCD display and an encoder knob. The Flash memory, provided by a Digilent's "pmod" module, was installed on the external board already built for the the Tape, Speaker, Joystick and SD-Card interfaces. The picture below shows an early prototype, where the encoder is still missing. The digilent board is however capable of running a basic version of the clone as it is, without additional hardware: see the Startup guide.
The original 16x2
LCD display has been replaced by OSD (on-screen-display).
The OSD shows operating information such as Z80 address, data and
control lines and relevant spectrum 128/+3 register's content. The
first row displays the content of following registers: $7FFD,
$1FFD, $24DF, $34DF, $54DF, $64DF. The second row shows real time Z80
address, data and operation (memory read, memory write, I/O read, I/O
write) and clock speed. See the Controls and the I/O
Registers List pages for a complete description.
The OSD and
the encoder let the user setup breakpoints and slow
the Z80 execution speed down to single-step, making
address/data/control display information human-readable. A running
point on the LED bar shows the real Z80 execution speed and completes a
turn (8 steps) every 500.000 opcode fetches. The resulting speed is
affected by Z80 clock rate, type of instruction being executed, speed
of memory, speed of I/O devices. All these functions are handled by a Picoblaze processor: the
Z80 is completely freed from any task other than running the
zx-spectrum clone itself.
Once the board is started by uploading the bitstream to the FPGA (via Jtag), Z80 firmware (the system bootrom and Sinclair ROMs or whatever) can be flashed on the SPI flash memory using the Z80 itself, in conjunction with the ZX-Com program and a COM port (see the quickstart instructions).
The main processor is the Fpga Arcade T80.
Current version can now run ResiDos by Garry Lancaster.
StartUP instructions to run the clone on your board.
Board's controls (button and switches operation while clone is running).
Pac-Man Emulator video (Simon Owen's PacemuZX
demonstrates the audio AY-3-8912 chip emulation)