Features - Downloads - Schematics - I/O Registers - Memory Map - Leave a Message

ZX-Badaloc Reloaded


ZX-Badaloc   Reloaded

A Spartan-3E FPGA implementation of the ZX-Badaloc Spectrum clone

This project is aimed at synthesizing the ZX-Badaloc, a ZX-Spectrum Clone developed in Italy, into a Xilinx SPARTAN-3E Fpga.


Loading Pssst and running Simon Owen's PAC-MAN emulator on the Digilent Nexys2 3E board


The original project's main CPLD, I/O and Keyboard cplds, Z80 Processor, IDT dualport video ram can be squeezed into a single chip.
This solves the main problem: WIRINGS.



Top and bottom views of the original clone, made in 2006


This FPGA implementation has been developed by the same author and runs on the Digilent Nexys2 Spartan 3E evaluation board, featuring an XC3S1200E fpga. The XCS500E board version is probably capable of running the project as well.

Migration from the original, CPLD-bases version was first started on a Xilinx Spartan 3E "HW-SPAR3E-SK-UNI-G" board and a Avnet 3A board, then merged togheter. Due to some user's requests, references and documentation about the project on those boards can be found here.

A few devices that were available on the Xilinx board are not present on the Nexys2: a SPI flash, an LCD display and an encoder knob. The Flash memory, provided by
a Digilent's "pmod" module, was installed on the external board already built for the the Tape, Speaker, Joystick and SD-Card interfaces. The picture below shows an early prototype, where the encoder is still missing. The digilent board is however capable of running a basic version of the clone as it is, without additional hardware: see the Startup guide.

The original 16x2 LCD display has been replaced by OSD (on-screen-display). The OSD shows operating information such as Z80 address, data and control lines and relevant spectrum 128/+3 register's content. The first row displays the content of following registers: $7FFD, $1FFD, $24DF, $34DF, $54DF, $64DF. The second row shows real time Z80 address, data and operation (memory read, memory write, I/O read, I/O write) and clock speed. See the Controls and the I/O Registers List pages for a complete description.


The OSD and the encoder let the user setup breakpoints and slow the Z80 execution speed down to single-step, making address/data/control display information human-readable. A running point on the LED bar shows the real Z80 execution speed and completes a turn (8 steps) every 500.000 opcode fetches. The resulting speed is affected by Z80 clock rate, type of instruction being executed, speed of memory, speed of I/O devices. All these functions are handled by a Picoblaze processor: the Z80 is completely freed from any task other than running the zx-spectrum clone itself.

Once the board is started by uploading the bitstream to the FPGA (via Jtag), Z80 firmware (the system bootrom and Sinclair ROMs or whatever) can be flashed on the SPI flash memory using the Z80 itself, in conjunction with the ZX-Com program and a COM port (see the quickstart instructions).

The main processor is the Fpga Arcade T80.

Current version can now run ResiDos by Garry Lancaster.

StartUP instructions to run the clone on your board.

Board's controls (button and switches operation while clone is running).

Pac-Man Emulator video (Simon Owen's PacemuZX demonstrates the audio AY-3-8912 chip emulation)

Latest Updates:

FPGA V1.06: Added AY-3-8912 sound chip emulation support (using the YM2149 core by MikeJ of www.fpgaarcade.com). A sigma-delta DAC converts the 8-bit output into a single digital signal. A simple external RC integrator is then used to drive the speaker amplifier. Audio output is demonstrated in the Pac-Man emulator video.

ZX-Com V5.4: Capability to import/export raw binary data from an sd-card snapshot made easier. This allows creating a ram-backup snapshot using a ResiDos 'nvram backup file' (residos.nvr) so it can be restored by bootrom firmware.

FPGA V1.05: The 'Rom Services' address trap ($25) is now disabled by default. This improves compatibility and solves an issue with the pac-man emulator written by Simon Owen.

FPGA V1.04: Bugfix: Ram Bank 0 is now (properly) writable when mapped on 0-$3FFF space using the special memory addressing mode of +2A/+3 models (register $1FFD). This bug prevented a PAC-MAN ZX-Spectrum emulator from running. Thanks to Simon Owen (author of the emulator) for the support in tracking down the problem.

BootRom V1.01 and ZX-Com V5.3: Support for ULA+. Color palette is now detected and saved / restored in both sd-card and rs-232 snapshots.

FPGA V1.03: The ULA+ color register is now RD/WR. This will be useful in order to backup a color palette into snapshots and detecting if a game is using ULA+ features. See the I/O register's page for details.

FPGA V1.02b: Added an OSD function that replaces the external LCD display for breakpoints, system monitoring, etc. External hardware is now easier to build.

FPGA V1.02: Added ULA+ support. Thanks to Alessandro Dorigatti (who did it first) for the support and source code.

FPGA V1.01: All changes up to latest Xilinx's board VHDL (1.32b) merged to the project: Picoblaze processor, encoder/switches/lcd display are now working as on the other board.

First version for Nexys2 board. The starting VHDL source 1.00 is a reduced version written for a Spartan 3A (Avnet) board, in turn coming from V1.11  29/11/2008 of the Xilinx 3E version. This made things easier because there is no DDR controller nor Picoblaze processor. The Z80 bootrom comes from latest (V0.99b) version for the Xilinx board: only the name string printed on screen has been modified. The version number is now 1.00. The VHDL rom which boots the system is the same written for the Xilinx board with no modifications.

See the full project History



I gatti preferiscono lo ZX-Spectrum



Contact the Author

free web analytics guide