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In 2008, the development of this clone has been moved to an FPGA design.

The original, still working CPLD-based version described in these pages is the only one unit ever built. This site is kept for historical reference.


Read More about the FPGA implementation of the clone

Read More about the ZX-MMC+ Project

Read More about the ZX-MMC Card Project



New ULA3 CPLD V5.1

The NMI trap at address $25 (37 decimal), used by the rom-services, is now inactive by default. It can be re-enabled by writing to the $44FD register with D0 = '1'. Any program that requires access to the library provided by the bootrom must set this bit prior of jumping at $25 location.

This improves compatibility  and solves an issue with the Pac-Man emulator written by Simon Owen, which now runs on the cpld-based clone too. This update has been developed on the Nexs2-fpga version of the clone and then ported back here.


New bootrom V5.11

This update will make the ResiDos detectection routine compatible with latest version (from V2.08 and up). ResiDos now places the signature at address $0 of bank 7 instead of previous address $3D00. This change was required by the FPGA-based clone, which maps standard zx-spectrum ram on the upper half of ram bank 7.



SPI port reworked for ENC28J60 Ethernet Controller compatibility

The SPI port built into the I/O CPLD works now in 'Idle Clock LOW' mode and provides an additional chip select. This allows preliminary test with Microchip's ENC28J60 SPI-based 10BASE-T Full Duplex Ethernet Controller. An Ethernet interface may be soon available on ZX-Badaloc.



New ZX-Com 4.2b Released; new ZXMMC+ interface in pre-production

This version can now be used with the IF1-compatible RS-232 port available on the new ZXmmc+ interface. It has additional functions for sd-card RAW data read/write/compare against a binary PC file, through ZX-Badaloc or ZXMMC+ serial ports.


A 128K +3e romset (64KB) is under development by Garry Lancaster: the sd/mmc card is used in place of the IDE disk or Compact Flash. For this reason, the SD/MMC interface is now available as a separate project too, that fits on Z80 socket of 128K +2A/+3 and provides communication to the card at 166KBytes/sec peak throughput @3.5MHz.

A small batch of zxmmc pcb (just the pcb, not the complete assembled device) IS AVAILABLE!

ZX-SD/MMC Card Project


ZX-Badaloc Overall description:

This is a beta project and just ONE wired prototype has been built until now. The prototype is working properly.

This unit is a 48K/128K ZX-Spectrum clone capable of running at 3,542MHz, 7,083MHz, 14,167MHz and 21,25MHz.

A 10BASE-T Ethernet Controller is under evaluation.

At a glance, the hardware is based on 3 Xilinx CPLDs (one XCR3384XL 144 pin (ula3) and two XC9572XL 44 pin (I/O and Keyboard/mouse/joystick)), a PIC16F877 (PS/2 keyboard, PS/2 mouse, programmable 10-inputs joystick), a 20MHz Z80, an 85MHz main oscillator, a few memory chips, an AY sound chip, an sd/mmc slot and a real time clock/calendar with cmos ram and lithium battery backup. The Keyboard cpld is also connected to a spectrum-style 40 keys local matrix-keyboard so the PS/2 keybd is not strictly necessary.

Video output: VGA monitor, @100Hz vertical retrace with on-board scan converter, built in the ULA3 cpld. Two video modes: the ZX-Spectrum standard 256x192 pixel (with 32 pixel border) and the hi-res 320x256 pixel full screen mode, with 4 bit per pixel (R, G, B, Bright).

Flashable firmware

PS/2 Keyboard and Mouse interfaces: the PS/2 keyboard maps several multi-keys command into single keystrokes, as well as normal keys. Mouse interface works in kempston mouse mode. Z80-readable registers for these features are implemented in the XC9572XL "Keyboard" CPLD, while communication with devices (keyboard, mouse and joystick) is handled by the PIC microcontroller.

The joystick is connected to a kempston port (first 5 inputs) implemented in the I/O CPLD and to the PIC microcontroller (full 10-inputs). The PIC, in conjunction with the Keyboard CPLD, can map any input to any of the 40-key matrix-keyboard for fully programmable operation. Joystick-to-key mapping table is uploaded by Z80 into PIC memory any time a snapshot is loaded from the SD/MMC card. The bootrom firmware let the user edit this table for each snapshot.

Expansion header: almost fully compatible with standard zx-spectrum hardware devices, with some exceptions

An SD/MMC card (1GB in the prototype) is connected to a very fast hardware SPI port (implemented in the XC9572XL "I/O" CPLD) capable of 1MByte/sec throughput. The firmware can restore snapshots of the entire 128K ram in 0,15 seconds. Up to 8188 128K snapshot can be saved to a 1GB card, with 32 characters filename. The filesystem is not standard.

A 115K2 bit/sec UART (implemented in the XC9572XL "I/O" CPLD) with NMI-handler on a swap-in ROM (the NMI signal is generated by the I/O cpld) supports communication with an host computer running the ZX-Com Win32 program. The source code of both programs (the Z80 side and the PC side) can be found in the software section. The control program can send/receive any memory region, change the processor clock (and a lot of other settings) and take 16/48/128K snapshots of the running program (that can be saved to a file on the host pc, then reloaded and sent back to the hardware). Receiving/sending a 48K snapshot takes a bit less than 5 seconds.

The program also lets create partial or full Backup/Restore/Verify of the SD/MMC content.

RAM: one 128KBytes chip for the scan-converter, one 128KB or 512KB NON-VOLATILE chip for 16/48/128K spectrum main memory, one 32KB dual-port chip for the spectrum video memory area. The battery backup for the 128/512K chip is handled by a DS1210 controller (Dallas semi), which introduces a delay on chip select as little as 20ns max.

ROM: one socket for 27C512 - 27C4001 eprom (64KB to 512KBytes) or FLASH ROM (29F...) can store 4 to 32 16KB-each ROMS, selectable by the boot firmware. The board is capable of writing to FLASHROM without the need of an external programmer (except for the first time). Two 16K ram pages (freed by the additional 32KB dual port chip) can be used in place of two of the 16K rom pages, enabling on-the-fly debug of rom firmware (easily uploadable by zx-com itself or by tape interface). On the prototype, a W29F020 Winbond FLASH ROM holds 128K-Spectrum roms 0 and 1 on first two banks, a genuine 48K-rom on the third, and the 16K bootrom firmware on the last bank (with room for 12 more roms).

This is a short video showing the snapshot restore process for two 128K and one 48K program.

Another video shows how a .wav "tape" file could be played (and successfully loaded) at 4x speed when the processor is run @14MHz instead of 3.5. It should be noted that the loaded program has a 150% faster turbo loader, so total throughput is around 6x times the normal speed.

The AY-3-8912 sound chip (for Spectrum 128K sounds) is clocked at 1.77MHz (as in the original 128K hardware). The stereo output is provided on a header connector, which is electrically compatible with PC-like amplified speakers. This chip will be soon connected to some spare TX/RX channels on the MAX238 chip to enable the software-based Spectrum 128K RS-232 and MIDI ports. The Sinclair keypad will not be supported.

A new DS1307 real time clock/calendar has been added and software development is now completed. This will allow future filesystems to be handled on the SD/MMC card with full date and time informations. By now, date and time is now saved with each new snapshot. The RTC data is also readable by basic programs.



Project description and notes v4.3 03/11/2007 (zipped Word file, English)

Project description and notes v4.2 (old) 01/03/2007 (HTML, English)


Project description and notes v4.3 03/11/2007 (zipped Word file, Italiano)

Project description and notes v4.2 (old) 01/03/2007 (HTML, Italiano)


VGA.PDF: ABEL and VHDL vga driver example. The VHDL version was the project starting point.